Reduced Area and Low Power Implementation of FFT/IFFT Processor
نویسندگان
چکیده
منابع مشابه
Design of Reconfigurable FFT Processor With Reduced Area And Power
Fast fourier transform (FFT) is an efficient implementation of the discrete fourier transform (DFT). The main objective of the project is to implement a reconfigurable FFT processor with reduced power and area in order to provide system designers and engineers with the flexibility to meet different system requirements. This paper proposes a low power and area efficient FFT architecture using Si...
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ژورنال
عنوان ژورنال: Iraqi Journal for Electrical and Electronic Engineering
سال: 2018
ISSN: 2078-6069,1814-5892
DOI: 10.37917/ijeee.14.2.3